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In electronics, a multi-level cell (MLC) is a memory element capable of storing more than a single bit of information. MLC NAND flash is a flash memory technology using multiple levels per cell to allow more bits to be stored using the same number of transistors. In single-level cell (SLC) NAND flash technology, each cell can exist in one of two states, storing one bit of information per cell. Most MLC NAND flash memory has four possible states per cell, so it can store two bits of information per cell. This reduces the amount of margin separating the states and results in the possibility of more errors. Multi-level cells which are designed for low error rates are sometimes called enterprise MLC (eMLC). == Overview == The primary benefit of MLC flash memory is its lower cost per unit of storage due to the higher data density, and memory-reading software can compensate for a larger bit error rate.〔(Micron's MLC NAND Flash Webinar )〕 The higher error rate necessitates an error correcting code (ECC) that can correct multiple bit errors; for example, the SandForce SF-2500 Flash Controller can correct up to 55 bits per 512-byte sector with an unrecoverable read error rate of less than one sector per 1017 bits read.〔(SandForce SF-2600/SF-2500 Product Info ) 2013-10-22〕 The most commonly used algorithm is Bose-Chaudhuri-Hocquenghem (BCH code).〔(A Tour of the Basics of Embedded NAND Flash Options ) EE Times 2013-08-27〕 Other drawbacks of MLC NAND are lower write speeds, lower number of program-erase cycles and higher power consumption compared to SLC flash memory. A few memory devices go the other direction, and use two cells per bit, to give even lower bit error rates.〔("Automotive EEPROMs use two cells per bit for ruggedness, reliability" ) by Graham Prophet 2008-10-02〕 The Intel 8087 uses two-bits-per-cell technology, and in 1980 was one of the first devices on the market to use multi-level ROM cells.〔"Four-state cell called density key" article by J. Robert Lineback. "Electronics" magazine. 1982 June 30.〕 Some solid-state disks use part of a MLC NAND die as if it were single-bit SLC NAND, giving higher write speeds.〔Geoff Gasior. ("Samsung's 840 EVO solid-state drive reviewed: TLC NAND with a shot of SLC cache" ). 2013.〕〔Allyn Malventano. ("New Samsung 840 EVO employs TLC and pseudo-SLC TurboWrite cache" ). 2013.〕〔Samsung. ("Samsung Solid State Drive: TurboWrite Technology White Paper" ). 2013.〕 Samsung has also launched a type of NAND that stores three bits of information per cell, with eight total voltage states. This is commonly referred to as Triple Level Cell (TLC) and was first seen in the 840 EVO Series SSDs.〔(Samsung SSD 840 Series - 3BIT/MLC NAND Flash )〕 Samsung refers to this technology as 3-bit MLC. SanDisk X4 flash memory cards are based on NAND-memory that stores four bits per cell, using 16 discrete charge levels (states) in each individual transistor.〔(SanDisk Ships World’s First Flash Memory Cards with 64 Gigabit X4 (4-Bits-Per-Cell) NAND Flash Technology )〕〔(NAND Flash - The New Era of 4 bit per cell and Beyond ) EE Times 2009-05-05〕 The negative aspects of MLC are amplified with TLC, but TLC benefits from higher storage density and lower cost. 抄文引用元・出典: フリー百科事典『 ウィキペディア（Wikipedia）』 ■ウィキペディアで「Multi-level cell」の詳細全文を読む スポンサード リンク
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